Through-silicon via (TSV) wafer
processing technology
Thinning and anti-pollution technology of through-silicon via wafer
In the thinning process of the through-silicon via (TSV) wafer, a new demand has been requested which did not exist earlier. In the VIA FIRST process to have the head of the electrode protruded, it is necessary to take the stock removal more than the stress relief amount of (about 2μm) which was necessary to improve the chip strength in the thinning process in the past. Given the variation of the precision drilling of the electrode, the amount needed is at least 5μm.
CMP stress relief for the Company was achieved by adjusting the oscillating conditions to the small diameter pad to a non-uniform removal rate of 5% or less. This can have the head of the electrode protruded uniformly.
Further, in the VIA FIRST process, a through hole is created in the thinned wafer, so it is necessary to maintain the standard of the former clean level after the process of thinning.
Our GDM300 can do the stress relief grinding and the final grinding process in an individual stage because there are two CMP stages for the stress relief. As a result, the efficiency of washing improves greatly, and particles at 0.2μm level have been decreased to a few or less.
When a 300mm wafer is polished with 10μm
Changes in the TTV of the number of wafer sheets before processing and after processing
Non-uniformity (2%) of when processing 200 consecutive sheets
Silicon thickness control by non-contact measurement system
The processing of the wafer attached to the support base has increased along with the mass production of Through-Silicon Via (TSV) and the MEMS wafers. By controlling the thickness during grinding in a grinder with non-contact thickness measurement; it only controls the thickness of silicon, with the accuracy of ± 1μm, regardless of the support base and thickness variations of BG tape.
Further, the silicon film thickness meter is similarly installed in the polisher, and instead of the conventional stock removal management by time, the grinding rate of the wafer under the processing is fed back to the next wafer and stability in stock removal management could be achieved. This technology is effective not only for the TSV process but also for the SOI wafer process where it is necessary to manage the thickness of the active layer at a submicron level.